Micron closed down 6.3% on Friday June 5, taking a clean spillover hit from the AVGO custom-ASIC reset that pulled the entire semi sector down by roughly $1 trillion in two sessions. The MU move was less severe than MRVL's 8% Friday drop because Micron's business model is structurally different. MU sells the high-bandwidth memory stacks that go into the chips that AVGO and MRVL design, which means Micron is exposed to the AI infrastructure cycle indirectly through customer order flow rather than directly through custom-program ramps.
The fiscal Q4 print lands June 25, and the catalyst that matters more than the headline number is the HBM4 pricing trajectory. Sanjay Mehrotra has the option to commit early on HBM4 supply contracts with NVDA, AMD, and the AVGO custom-ASIC customer base, and that decision shapes the next two years of Micron revenue. Here is why the HBM4 cycle is the actual pivot and why the SK Hynix yield curve still defines the competitive setup.
What HBM4 Actually Is and Why It Matters
High-bandwidth memory is the stacked-DRAM architecture that sits directly on the chip package next to the GPU or ASIC die. The current generation is HBM3E, which is what NVDA's Hopper-generation H200 and the early Blackwell parts use. HBM4 is the fourth-generation design and is a structural step-change across three specifications.
The interface widens from the HBM3E 1024-bit bus to a 2048-bit bus, which roughly doubles the per-stack bandwidth at the same clock speed. The stack height moves to 12-die or 16-die in the highest-end SKUs, up from the typical 8-die stacks in HBM3E. The base die incorporates a logic layer that can offload memory controller functions from the host chip, which improves system-level efficiency.
The net effect is that HBM4 delivers roughly 2.5x the bandwidth per package versus HBM3E at similar power. That bandwidth gain is what enables the next generation of AI accelerators to run inference at the larger context windows and training at the parameter counts the labs are targeting for 2027 and 2028. Every major AI silicon program from NVDA Rubin to AMD MI400 to the AVGO custom-ASIC roadmap is architected around HBM4 timing.
The HBM4 mass-production window opens in late 2026, and the supply contracts that determine which memory vendor gets which customer are being negotiated right now, per the supply-chain detail tracked across Micron's investor presentations. This is the period where Sanjay Mehrotra's positioning decisions matter most.
Why MU Lost the Prior Generation HBM3E Sales Mix to SK Hynix
Source: Yahoo Finance
The HBM3E generation was Micron's catch-up window after the company shipped late on HBM2E and HBM3. SK Hynix qualified the HBM3E parts for the NVDA H200 program first, and SK Hynix's investor relations pagedocumented that SK Hynix held roughly 50% of the HBM3E supply share for NVDA through 2024 and into 2025. Samsung captured most of the remainder. Micron qualified second and shipped third.
The reason for the lag was yield. HBM stacking is a yield-sensitive process because every die has to survive the through-silicon-via stacking step. SK Hynix had a roughly 12-month head start on the HBM3E yield curve because of an earlier capex commitment to the stacking equipment. Micron caught up across 2025 and finished the fiscal year with a credible mid-teens share of the HBM3E mix, but the bulk of the program-cycle margin had already been captured by SK Hynix.
The structural takeaway is that HBM share is a function of how early a vendor commits capex to the yield curve. Late commitment costs share at the front of the cycle, which is exactly when the program-cycle margin is highest. The Micron investor relations page breaks out the HBM segment progression in the most recent quarterly disclosures.
Why HBM4 Is Micron's Catch-Up Window
The HBM4 generation gives Micron a clean second chance because of three independent dynamics that were not present in the HBM3E cycle.
The first is capex timing. Micron committed to HBM4 stacking equipment at the same time as SK Hynix in late 2024, which means the yield curves at the start of HBM4 mass production should be much closer than they were at the start of HBM3E. The Idaho gigafab and the New York fab expansion include HBM4-specific capacity that ramps on the same timeline as the customer programs.
The second is customer diversification. The HBM4 buyer pool is broader than HBM3E because the custom-ASIC complex (AVGO, MRVL, and the hyperscaler-direct programs) is now a meaningful demand vector alongside the merchant-GPU vendors. The custom-ASIC customers are explicitly trying to dual-source HBM to avoid the SK Hynix concentration risk they experienced in the HBM3E cycle. That dynamic favors any credible second-source vendor, and Micron is the cleanest US-domiciled second source.
The third is the geopolitical premium. US hyperscalers and the US government are both incentivized to make sure that the AI infrastructure supply chain has a domestic memory vendor with at least 30% share in the next generation. Micron is the only US-domiciled HBM supplier at meaningful scale, and the policy tailwind is real. The CHIPS Act funding allocation for Micron's Idaho and New York fabs is explicitly tied to HBM expansion, which provides a capital subsidy that SK Hynix and Samsung do not receive.
The supply imbalance through end-2026 favors MU specifically because HBM4 demand is structurally outrunning total industry capacity, and a credible second-source vendor with US policy tailwind can capture share even at slightly below-leader yield.
Where MU Support Sits and Why the Q4 Print Matters
MU closed Friday around $92. The support stack sits at $85 first, which is the late-April consolidation zone, and $78 as the structural level from the February swing low.
The fiscal Q4 print on June 25 is the catalyst that resets the multiple in either direction. The numbers the market will read most closely are the HBM-specific revenue disclosure, the HBM4 customer-commitment language, and the fiscal 2027 capex guide. A constructive HBM4 commitment from Mehrotra with explicit customer-program language and a capex guide consistent with maintaining the announced fab expansion timeline is the bull setup. A muted commitment with vague timing language is the bear setup.
The broader Phemex AI agents context frames the AI infrastructure layer as the dominant capital-intensity story across the semi sector, and Micron sits at the memory layer of that capital-intensity stack. The print is the next data point.
Frequently Asked Questions
Is Micron a buy at the current level?
The cleanest entry waits for the June 25 print and for confirmation that the HBM4 customer commitments are tracking on schedule. Buying ahead of the print is a directional bet on Mehrotra delivering constructive language on HBM4 pricing and capex. The bull case has a clear structural setup, but the timing of the upside depends on the customer-commitment cycle landing in fiscal 2027 rather than slipping.
How does SK Hynix actually beat Micron on HBM share?
By being earlier on the capex commitment for each generation. SK Hynix made the HBM-specific capex decision roughly 12 months ahead of Micron for HBM2E and HBM3E, which translated into a yield-curve lead that allowed SK Hynix to qualify customer programs first and lock in the front-cycle margin. The HBM4 capex commitment was closer to simultaneous, which changes the structural setup for this generation.
What does it mean for the broader AI hardware complex?
The HBM supply allocation across NVDA, AMD, and the custom-ASIC programs is one of the constraint variables that determines how fast the AI infrastructure buildout can actually deploy. If HBM4 supply is tight, the merchant-GPU and custom-ASIC ramps both pace at memory availability. If HBM4 supply ramps faster than current consensus, the entire AI compute layer accelerates. Micron's share in that supply determines how much of the cycle profit Micron captures.
Is the AVGO digestion phase actually negative for Micron?
Mildly negative in the very short term because slower custom-ASIC order flow translates to slightly weaker memory pull. The HBM4 cycle is structurally upstream of the AVGO digestion-phase question because HBM4 supply contracts are negotiated 12 to 18 months ahead of silicon delivery. The Q4 print will indicate if the HBM4 commitments are tracking independently of the near-term order softness in the custom-ASIC layer.
Bottom Line
Micron lost 6.3% Friday in the AVGO spillover but the structural story sits one layer upstream of the custom-ASIC question that the AVGO print just raised. HBM4 is the catch-up window after the HBM3E lag, and the supply imbalance through end-2026 favors any credible second-source vendor with US policy tailwind. The June 25 fiscal Q4 print is the catalyst that either confirms the HBM4 commitment trajectory or signals that the customer-program negotiations are slipping. Support sits at $85 and $78. The first level is the trade. The second level is the thesis. Watch for explicit HBM4 customer language on the call and a capex guide consistent with maintaining the Idaho and New York fab expansion timeline.
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