AMD has commenced mass production of its sixth-generation EPYC processors, codenamed Venice, on TSMC's 2nm node in Taiwan. This development marks the first high-performance computing product to utilize TSMC's advanced 2nm process. The Venice processors are designed to meet the increasing memory demands of agentic AI, with future Verano processors also set to use the 2nm process and integrate LPDDR memory.
In addition to production in Taiwan, TSMC's Arizona facility is slated for future mass production. AMD is investing over $10 billion into Taiwan's ecosystem to expand advanced packaging capacity, benefiting key supply chain companies like ASE, SPIL, and PTI. PTI has notably completed validation of panel-level EFB 2.5D interconnect technology, enhancing the Venice CPU's bandwidth and energy efficiency. AMD's Helios rack-scale systems, featuring Venice CPUs and Instinct MI450X GPUs, are being assembled by companies including Sanmina and Wistron, with deployment expected in the latter half of 2026.
AMD's 6th Gen EPYC Venice Processor Begins 2nm Production at TSMC
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