
Taiwan Semiconductor Manufacturing Company priced 2nm wafer production at $30,000 per wafer for the early-2027 production ramp, according to supply-chain channel checks circulating among the sell-side semi desks on June 3 and 4. That price compares to $20,000 per wafer for 3nm and $18,000 per wafer for 5nm, which means the per-wafer cost is rising 50% on a single node transition. The increase is the steepest single-node jump TSMC has put through in the past two decades and reflects the combined cost of GAA (gate-all-around) transistor architecture, EUV lithography intensity, and the lower per-wafer yields that come with a leading-edge node ramp.
Every customer that has signed a 2nm capacity reservation is now budgeting around the new number. NVIDIA's Vera Rubin platform is on 2nm for the 2027 launch. Broadcom's next-generation custom ASIC for hyperscale customers is on 2nm. AMD's MI400 series is on 2nm. Apple's A20 chip is on 2nm. Qualcomm's next flagship mobile SoC is on 2nm. The wafer price sets the floor on gross margin for every one of those products. Here is what that floor actually does to the AI stack and why TSM's pricing power matters more than any single customer's design win.
2nm Wafer Economics: Yields, Defects, and Why $30K
The $30,000 price reflects three underlying costs. The first is the EUV lithography step count, which roughly doubles from 5nm to 2nm because the smaller feature sizes require more critical layers to be patterned with EUV rather than with the cheaper deep-UV stepper tools. The second is the GAA transistor architecture, which replaces the FinFET structure used at 3nm and below with a nanosheet-based architecture that requires new fab tooling and tighter process control. The third is the early-node yield ramp, where defect density per square centimeter starts higher than mature nodes and pulls down on the per-wafer good-die count.
The yield math is the part that matters most for the customer pass-through. A 2nm wafer at TSMC's early production yield (estimated around 65% to 70%) produces roughly 25% fewer good dies per wafer than a mature 3nm wafer at 90%-plus yield. Combine the higher wafer price with the lower good-die count and the per-die cost is up roughly 80% from the 3nm equivalent. That number is the actual gross-margin pressure the customers are absorbing, not the headline 50% wafer price increase.
The yield curve will compress over the first 18 months of production as TSMC's defect-density work catches up with the new node, which is the same pattern that played out on 5nm and 3nm. By late 2028 the per-die cost gap should narrow to roughly 30% to 35%, which is in line with historical node-transition economics.
The AI Capex Pass-Through: Who Eats the Cost
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Customer
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2nm product
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Gross margin sensitivity
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Pricing power
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NVIDIA
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Vera Rubin (2027)
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Moderate (passes most through)
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High (hyperscaler customers)
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Broadcom
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Custom ASIC (2027)
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Low (cost-plus contracts)
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Pass-through is contractual
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AMD
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MI400 series
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High (competing on price with NVIDIA)
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Medium
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Apple
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A20 chip
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Low (vertical integration absorbs)
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High (consumer premium)
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Qualcomm
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Snapdragon flagship
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High (OEM customers price-sensitive)
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Low
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The dispersion across customers is wider than the headline math suggests. NVIDIA and Apple sit at the high pricing-power end of the table because the end customer (hyperscalers or premium consumers) tolerates absolute price increases for performance. AMD and Qualcomm sit at the low end because their customers (cloud providers competing with NVIDIA-equipped peers, smartphone OEMs competing on bill-of-materials) push back hard on price. The 2nm wafer cost is therefore not a flat tax on the AI stack. It is a progressive tax that hits the lower-pricing-power players hardest.
Broadcom is the interesting case because the custom ASIC contracts with hyperscalers are typically structured as cost-plus arrangements where the wafer price increase passes through directly to the customer. That structure makes Broadcom relatively insensitive to the per-wafer cost (the gross margin percentage holds) but exposes the underlying hyperscaler customer (AWS Trainium, Google TPU) to the full pass-through.
TSM's Pricing Power: No Real Alternative Until 2027 or Later
The reason TSMC can push through a 50% per-wafer increase without significant customer pushback is the absence of a credible alternative at leading-edge nodes. Samsung's 2nm GAA process is targeting late 2026 or early 2027 risk-production with a customer ramp that pushes meaningful volume into 2028. Intel Foundry's 18A process (Intel's equivalent of 2nm) is targeting customer ramp in 2026 but the customer commitments to date have been limited to a handful of design starts rather than full-volume product transitions.
That positioning gives TSMC effective monopoly pricing on 2nm capacity from now through the end of 2027. Customers that need 2nm performance for competitive reasons have no choice but to pay the new price, and TSMC's capacity allocation process favors customers that signed multi-year wafer agreements at the prior price points. The combination of monopoly pricing and capacity allocation discipline is why TSMC's gross margin is structurally higher than any other foundry's, and the 2nm cycle is positioned to extend that gap.
The Samsung 2nm risk-production timeline is the single most important external variable. If Samsung's yield ramp matches the public timeline and the customer commitments materialize, the 2nm pricing power compresses by mid-2028. If Samsung slips by another year (which the prior two nodes have shown to be the central tendency), TSMC's pricing power extends through 2029. TSMC's most recent investor update walked through the 2nm capacity build and the customer pipeline.
What Investors Should Track for the Next 18 Months
Three signals decide if the 2nm wafer pricing thesis plays out as the bull case or compresses earlier than expected. The first is TSMC's monthly revenue prints from late 2026 onward, where the 2nm contribution will become visible inside the leading-edge revenue mix. The second is the yield curve commentary from each customer's earnings calls (NVIDIA, AMD, Apple, Qualcomm all disclose qualitative yield commentary in their quarterly disclosures). The third is the Samsung Foundry capacity reservation announcements from late 2026, which signal if the 2nm competition is arriving on time.
The reason this matters for the broader AI infrastructure thesis is that wafer cost is the single largest input to compute cost. Every meaningful change in compute cost flows through to the cost-per-token economics of large language model training and inference. If 2nm pricing power holds and the per-die cost stays elevated through 2028, the unit economics of frontier model training stay tight, which advantages the hyperscalers with the largest capex budgets. If Samsung's competition compresses the pricing power on schedule, the cost curve bends down faster and the smaller players catch up faster.
For broader context on how the AI infrastructure stack ties to crypto-adjacent compute markets, the Phemex AI agents primer walks through the upstream compute that powers on-chain agent workloads.
Why This Matters for the TSM Stock Print
TSM trades at a forward earnings multiple that already prices in significant 2nm-driven margin expansion, but the consensus model assumes a more measured wafer price increase (closer to 30% than 50%). The actual 50% per-wafer increase implies a gross margin expansion path that runs roughly two to three percentage points above consensus through 2027 and 2028, which is the kind of compounding that can support continued multiple expansion in a stock already up sharply year-to-date.
The risk is that customers respond to the higher pricing by deferring 2nm ramps and stretching their 3nm product cycles. The early signals from the design-win pipeline argue against that response. NVIDIA, Broadcom, AMD, and Apple have all publicly committed to 2nm products on the announced timelines, and the competitive dynamics inside each customer's end markets do not allow for a one-year deferral without losing share.
Frequently Asked Questions
Why is TSMC charging $30,000 per 2nm wafer?
The $30,000 price reflects the combined cost of GAA transistor architecture, doubled EUV lithography step count, and lower early-node yields that produce roughly 25% fewer good dies per wafer than mature 3nm production. The combination pushes per-die cost up roughly 80% from the 3nm equivalent, even though the headline wafer price increase is 50%.
Which AI stocks are most exposed to the 2nm wafer cost pass-through?
AMD and Qualcomm sit at the high-sensitivity end because their end customers push back hard on price. NVIDIA and Apple sit at the low-sensitivity end because hyperscalers and premium consumers tolerate the cost. Broadcom is relatively insulated because the custom ASIC contracts are typically structured as cost-plus, passing the wafer price increase through to the underlying hyperscaler customer.
When will Samsung or Intel offer a competitive 2nm alternative?
Samsung's 2nm GAA process is targeting late 2026 or early 2027 risk-production with meaningful customer volume slipping into 2028. Intel Foundry's 18A is targeting 2026 customer ramp but the design-start commitments have been limited so far. The combination gives TSMC effective monopoly pricing through the end of 2027 with potential compression by 2028 if Samsung executes on time.
How does 2nm wafer pricing affect AI training and inference cost?
Wafer cost is the largest input to compute cost, so higher per-die cost flows through to higher cost-per-token for frontier model training and inference. The 2nm pricing power advantages hyperscalers with the largest capex budgets because they can absorb the higher unit cost at scale, while smaller players face a steeper cost curve until Samsung's competition compresses pricing.
Bottom Line
TSMC's $30,000 per-wafer 2nm price is the steepest single-node cost increase in two decades and reflects effective monopoly pricing power that runs from now through at least the end of 2027. The pass-through hits AMD and Qualcomm hardest, hits NVIDIA and Apple least, and runs through Broadcom's custom ASIC business as a contractual cost-plus passthrough to the underlying hyperscaler customer. The three signals that decide if the pricing power holds are TSMC's late-2026 revenue prints, the yield commentary from each customer's calls, and the Samsung Foundry capacity reservations from late 2026 onward. The asymmetry favors TSM's gross margin expansion case running ahead of consensus through 2028.
This article is for informational purposes only and does not constitute financial or investment advice. Stock and crypto trading involves substantial risk. Always conduct your own research before making trading decisions.
